FIG. 1 schematically shows an example of a semiconductor device 10, e.g., a CMOS device. The semiconductor device 10 comprises a substrate 12 on which an electronic circuit 14 is provided. The electronic circuit 14 may be formed at least partly on or in the substrate. For example, the electronic circuit 14 may comprise components such as diodes or transistors comprising doped regions of the substrate 16 and suitably interconnected by metal conductors on or in the substrate. In the example, the electronic circuit 14 is a micro controller unit (MCU). However, it may be any other kind of electronic circuit. The electronic circuit 14 may comprise multiple contact pads 16, e.g., two or more contact pads, for connecting the electronic circuit 14 to an external device (not shown).
A problem that may be encountered with a semiconductor device of this kind is that a spurious electrical current may temporarily be injected into the substrate 12 via the pads 16. Current injection may, for example, be caused by radio frequency perturbations in an environment of the semiconductor device 10, or by perturbations generated or transmitted by an external device connected to the electronic circuit 14 via the contact pads 16. At least part of the injected current may flow through regions of the substrate that are not part of the electronic circuit 14 and may therefore cause various undesired effects such as voltage surges and state transitions. The injected current may notably pass through isolating regions of the substrate 12, e.g., through regions intended to isolate diodes, transistors, or other components of the circuit from each other.
In one scenario, negative charge carriers, e.g., electrons, are injected via the pads 16 and accumulate at a negative well, e.g., a negatively doped region, of the substrate 12, thus temporarily lowering the electrical potential at the negative well. In another scenario, negative carriers are injected via a subset of pads, traverse the substrate and leave the substrate via another subset of pads. In both scenarios, the injected current may have undesired effects.
In order to protect sensitive parts of the electronic circuit 14 against injected currents, a guard ring 18 may be provided, as proposed, for example, in U.S. Pat. No. 5,168,340 (Nishimura). The guard ring 18 may surround the electronic circuit 14 or a sensitive region thereof, or it may extend along a major portion of a contour surrounding the sensitive region. The guard ring 18 may, however, be insufficient when the magnitude of the injected current exceeds a critical magnitude. Furthermore, it may be desirable to produce substrates which do not require a guard ring.
U.S. Pat. No. 8,315,026 B2 (Roth) proposes integrating a substrate current sensor 20 in the substrate 12, for sensing an injected substrate current. The substrate current sensor 20 may, for example, be connected to a current meter 22 for generating a signal 24 indicative of a magnitude of the substrate current. The signal 24 may be provided to the electronic circuit 14, thus enabling the electronic circuit 14 to respond to the substrate current in a suitable manner, for instance, by switching to a safe mode. The substrate current sensor 20 and the meter 22 may be part of the electronic circuit 14. Notably, the meter 22 may be arranged on or in the substrate 12 and be integrated in the electronic circuit 14, although this is not shown in the figure.
FIG. 2 schematically shows a cross section of an example of a substrate 12 as may be included in, e.g., the semiconductor device 10 shown in FIG. 1. A similar substrate has been described in greater detail in the above mentioned U.S. Pat. No. 8,315,026 B2 by Roth et al. It may comprise, for example, an injecting device 26, e.g., a PMOS field effect transistor (FET), the substrate current sensor 20, the guard ring 18, and a sensitive device 28, e.g., a PMOS FET. In a variant of the example, the guard ring 18 may be absent.
In the event of, e.g., an external perturbation, negative carriers may be injected into the substrate 12 via the injecting device 26 and be attracted by the sensitive device 28. In the example, the substrate is of a p type, and the sensitive device 28 comprises a negative well (n well) which may attract the negative carriers. A substrate current from the sensitive device 28 to the injecting device 26 through the substrate 12 may thus occur. The sensitive device 28 may thus be charged negative, which may be undesired. The substrate current may be supressed or reduced by the guard ring 18. The attraction of negative carriers by the negative well is an example of a bipolar coupling effect. In the case of an n-doped substrate (not shown), positive carriers (holes) may be attracted by a p-well.
Capacitive coupling of currents is another effect that may be observed in a semiconductor substrate. In one example, an aggressor pumps current into and out of the substrate through its capacitance to the substrate. As the resistance of the substrate is finite, this may modulate the substrate potential and a component located on or in the substrate (referred to as a victim) may then experience an exchange current through its own capacitance to the substrate. This can cause a variation of the potential into either direction on the victim's side.
An example of an embodiment of the sensor 20 and an example of a mode of operation of the sensor 20 are described in reference to FIGS. 3, 4, and 5.
As schematically illustrated in FIG. 3, the substrate current sensor 20 may be arranged to attract carriers injected into the substrate 12, e.g., negative carriers. To this end, the substrate current sensor 20 may comprise a charge collecting region 30 for attracting the carriers, e.g., a negative well 30 for attracting the negative carriers. Furthermore, the sensor 20 may comprise a current source 32 for removing carriers from the charge collecting region 30; e.g., for removing a quantity of negative carriers from the negative well 30.
As schematically illustrated in FIG. 4, the current source 32 may be connected to the negative well 30 and be arranged to produce a reference current Iref (also referred to herein as the threshold current) from a supply node 34 to the negative well 30, thus charging the negative well 30 and raising the potential at the negative well 30 to a sensor potential Vsensor which may be the potential at the supply node 34. Thus, a current comparator may be formed. When the injected current Iinjected exceeds the reference current Iref, the negative well 30 may decharge and its potential may fall accordingly. The current source is not an ideal current source. Rather, it is an implementable current source. It may sustain the reference current Iref only as long as the potential at the negative well is below a supply level of the current source.
A flip flop 38, e.g., a RS flip flop, may be connected, e.g., via an inverter 36, to the negative well 30 so as to detect the voltage drop at the negative well 30 that may be caused by the injected current Iinjected. In the example, when the injected current is less than the reference current of the current source 32, the input of the inverter 36 is high and the set input (S input) of the flip flop 38 is low. When the injected current exceeds the reference current Iref, the input of the inverter 36 is pulled low and the S input of the flip flop 38 is driven high, thus setting the flip flop 38. The flip flop 38 may thus indicate that the injected current Iinjected has exceeded the reference current Iref. The Q output of the flip flop 38 may be connected, for example, to a control unit (not shown). The control unit may be arranged to set the electronic circuit 14 into an appropriate operating mode or into an appropriate state in dependence of the state of the flip flop 38. The sensor 20 as well as the control unit may be integrated in the electronic circuit 14.